Createspace Independent Publishing Platform
Real Chip Design and Verification Using Verilog and VHDL
Product Code:
9781539769712
ISBN13:
9781539769712
Condition:
New
$60.00
$58.16
Sale 3%
Real Chip Design and Verification Using Verilog and VHDL
$60.00
$58.16
Sale 3%
Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices.
| Author: Ben Cohen |
| Publisher: Createspace Independent Publishing Platform |
| Publication Date: Oct 06, 2002 |
| Number of Pages: 426 pages |
| Binding: Paperback or Softback |
| ISBN-10: 1539769712 |
| ISBN-13: 9781539769712 |
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