Springer
Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS
Product Code:
9783319023779
ISBN13:
9783319023779
Condition:
New
$118.37
Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS
$118.37
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
| Author: Brandon Noia |
| Publisher: Springer |
| Publication Date: Dec 02, 2013 |
| Number of Pages: 245 pages |
| Binding: Hardback or Cased Book |
| ISBN-10: 3319023772 |
| ISBN-13: 9783319023779 |
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